Dual-channel SDR transceiver pieces together 14 bits

Want dynamic range? Better get a whole lot o’ bits: 14 of them, in fact, and sampled at 400 MHz. Now double this and you’ve just described the front end on Pentek’s Model 7156 Dual Channel Transceiver, residing on a PMC form factor. Based upon the TI ADS5474, the input should be useful for designers needing high-bandwidth channels, wideband data conversion, or multichannel synchronization – in SDR, radar, or other data acquisition applications. As well, there’s a dual FPGA section for IF processing, data reduction, or a handy place to crunch some DSP numbers or implement custom I/O. Both FPGAs are based upon Xilinx Virtex-5 devices, either LXT (logic) or SXT (DSP). [Editor’s note: Xilinx tells us that the “L” stands for logic; that makes sense. But the “S” is for signal, as in DSP; not so obvious.] Output from the PMC consists of twin TI DAC5688 DACs running at 800 MHz. There’s also a 100 MHz 64-bit PCI-X interface, and an XMC gigabit interface. Pentek has thoughtfully routed some of the FPGA’s gigabit LVDS transceiver links to the connectors for customers who desire to use the Xilinx Aurora protocol, or their serial fabric of choice. Lastly, it must be pointed out that Pentek’s GateFlow library is home to lots of other IP bits, just in case designers need to stuff some other functions into those FPGAs.