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  Articles  OpenVPX: It’s all about the backplane
Articles

OpenVPX: It’s all about the backplane

Ray Alderman, VITARay Alderman, VITA—April 20, 20090
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There has been quite a flurry of enthusiasm and angst in the VPX (VITA 46) community concerning Mercury Computer Systems’ OpenVPX Industry Working Group announcement. At the November 2008 VITA Standards Organization (VSO) meeting, I challenged VITA members to start thinking about systems-level specifications needed to tie all the dot specifications together and eliminate some potential interoperability and compatibility problems with boards and backplanes. In January 2009, Mercury Computer Systems announced the formation of OpenVPX, an independent group tasked with accomplishing that goal. OpenVPX is populated by many of the prime contractors (the users) and numerous systems vendors (the suppliers) in the MIL/COTS market. Their objective is to create the needed systems design guide specifications for VPX, then bring that document back to the VSO for review and standardization.

Cramming a bunch of boards in a box does not create a system; it creates a box full of boards with all their inherent problems. The existence of integrators is prima facie evidence that a box full of boards is not a system. Merriam-Webster provides some guidance in defining the word system: instrumentality that combines interrelated interacting artifacts designed to work as a coherent entity; a group of independent but interrelated elements comprising a unified whole; a complex of methods or rules governing behavior; organization: an ordered manner; orderliness by virtue of being methodical and well organized; a procedure or process for obtaining an objective.

The key words here are coherent entity, unified whole, rules governing behavior, orderliness through organization, and obtaining an objective. It has taken more than 30 years for us to finally realize that board-level thinking is the bane of our existence.

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A system is basically a set of concentric circles, with different subsystems at each level. Those subsystems preprocess data streams and interface into the system architecture at different levels, depending on their behaviors. The main system computing elements are at the center, the core of the architecture. The last thing you want is for subsystems with noncritical functions such as data storage and aberrant behaviors (non real-time responses and/or unstable I/O interfaces) to connect at the computing core. The rules of system design define at which level certain functions are connected. And, how they are connected is tightly defined and standardized.

We have multiple fabrics to deal with (Ethernet, RapidIO, PCI Express, and so on), plus some of the fabrics are certifiably retarded. For example, the history of PCI Express silicon development exhibits a complete lack of systems-level engineering. The first two versions had no provisions for multiprocessing mechanisms (broadcast, synchronization, and so on), but its creators claim they will integrate those functions in Version 3 silicon. We also have different topologies to hook things together (meshes, stars, double stars, switches, fat trees, and so on) that exhibit some type of aberrant operating behavior. While all these options have been well captured and defined in the VITA 46 dot specifications at VSO, it is time to choose certain options (at the expense of others) and define exactly how a VPX system will behave. This will guarantee that every single VPX board will plug into a VPX backplane and work the first time, every time.

Board-level thinking is bottom-up thinking. That has been driven by the semiconductor companies, who have the systems-level expertise of a barnacle. Systems-level thinking is top-down thinking. Some VPX systems will have two or three subsystems in the same backplane/chassis. A subsystem must be isolated from the main systems architecture so that it does not contaminate the core computing elements with errors or bad data. Subsystems preprocess long streams of data rather than sharing them or sending them to other system elements. And the subsystem interfaces (how and where they hook into the main systems architecture) must be well defined and standardized. Additionally, subsystems should isolate short life-cycle semiconductor technologies, specifically I/O chips from the systems architecture, so that those functions can easily be replaced without disturbing the core system processing elements.

As indicated, a system-level specification is all about the backplane. Such a specification defines all the data paths for the subsystem boards. It defines the traces for connecting the subsystems to the main system architecture, and it defines all the power distribution traces for each slot. It has the connections for the systems management bus, and it defines all the connections for the unique I/O coming in through the backplane to the subsystem boards. Once a backplane is put into these systems such as an ATR box, it stays there for decades as we have seen with VME for the past 27 years. We need to assure that the same promise of backward compatibility exists with VPX.

It is critical that we define the system architecture, choose certain options from the dot specifications, eliminate others, and meet Merriam-Webster’s definition of a system. The OpenVPX effort will continue to strengthen the alliance between industry users and suppliers that was initiated by VITA more than 10 years ago. VME was put together with systems-level thinking back in the 1980s, but the industry lost the bubble when the commodity desktop semiconductor vendors and the telecom zealots pushed us back into the Stone Age. It has taken nearly 30 years to get back to sanity, but systems-level thinking has finally come back.

For more information, contact Ray at [email protected].

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