AUSTIN, TX — April 01, 2008 — The RapidIO® Trade Association, dedicated to driving the development and adoption of the RapidIO interconnect standard, today announced the first of its RapidIO Global Design Summits 2008, “Converge, Learn, Innovate and Design,” to be held May 21, 2008 at the Novotel following WiMAX World EMEA in Munich, Germany. This highly anticipated event will give engineering managers, system architects, and product developers the opportunity to learn from technology experts representing CommAgility, Fabric Embedded Tools (FET), Freescale Semiconductor, IDT, Mercury Computers, RIOLAB, Texas Instruments, Tundra Semiconductor, VMETRO and Xilinx.
“RapidIO technology is the most efficient multi-host/processor available and delivers the lowest cost-per-bit in the industry,” said RapidIO Trade Association Executive Director Tom Cox. “These design summits provide a place for the world’s best designers to converge, learn the latest about the RapidIO specification and its expansive ecosystem, and discover innovative ways to speed high performance, highly reliable solutions to market.”
RapidIO Global Design Summits 2008 attendees will gain practical information on the RapidIO standard including implementation details for designing next generation solutions. The latest RapidIO standard roadmaps and technology updates, as well as news from the RapidIO ecosystem will be included. This event provides an exceptional opportunity for networking with business leaders and technical specialists from within the RapidIO Trade Association.
The free, day-long event will feature interactive presentations and culminate with a panel discussion and Q&A. The preliminary agenda features:
— The RapidIO Interconnect Standard 1.3, 2.0 and Beyond, Why Embedded
Systems Need RapidIO Technology
— Designing FPGA-based 10G Applications Using Serial RapidIO Protocol
— Design Implementation of RapidIO Technology in Wireless Infrastructure
Subsystem
— The Value Proposition for RapidIO Technology When Using Today’s
Multicore SoCs
— Using RapidIO Backplanes in Wireless MicroTCA Systems
— Bridging The Gap From Baseband To Antenna: Serial RapidIO to Common
Public Radio Interface (CPRI)
— Deploying RapidIO Technology in MicroTCA Systems
— Serial RapidIO for Wireless Communication Fabrics in MicroTCA
— RapidIO Interconnect Debugging Techniques And Tools
— RapidIO Device Level Interoperability Testing
— Why Serial RapidIO is the Fabric of Choice for Distributed Multi-
processing
Attendance is free, but advance registration is required because seating is limited. Please check the website often as the agenda is subject to change: www.rapidio.org/events/design_summits_2008/.
About the RapidIO Standard
The RapidIO standard is the embedded interconnect developed by the embedded market specifically for embedded applications. This ISO-certified, open-standard enables best-in-class quality of service and performance in multi-host embedded processor applications — from components to systems — that require reliable, high speed, cost-effective embedded connectivity. The RapidIO interconnect standard seamlessly enables the chip-to-chip, board-to-board, control, backplane and data plane interconnections needed in high-performance networking, communications and embedded systems.
The RapidIO Trade Association enables, supports and drives the development of the RapidIO ecosystem, and provides the information and resources OEMs need to deliver better solutions, faster. Membership in the RapidIO Trade Association provides the inside track on information, the opportunity to shape specifications, access to pooled resources, and superior overall market awareness. Detailed information on the RapidIO specification, products, design tools, member companies, and membership is available at www.RapidIO.org.
