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  News  New Products  CommAgility VPX module provides rugged DSP and FPGA performance
New Products

CommAgility VPX module provides rugged DSP and FPGA performance

CommAgilityCommAgility—May 8, 20140



CommAgility today announced the VPX-D16A4, a rugged high performance DSP and FPGA based card in the compact VITA™ 65, 3U OpenVPX™ form factor. The module is ideal for applications such as software defined radio (SDR) (including LTE, Remote Radio Head (RRH), WiMax and Cloud RAN), imaging or radar, and is well suited to military or other harsh field deployment environments.

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The VPX-D16A4 is CommAgility’s first board in the rugged VPX form factor, and is available as either conduction cooled or air cooled versions. For maximum flexibility in interfacing, it supports SRIO, Ethernet, CPRI and Multi-Gigabit Transceiver (MGT) to the backplane plus links to RF or analogue I/O.

The board is based around a Texas Instruments (TI) TCI6638K2K KeyStone™-based System-on-Chip (SoC) and a TI TMS320C6678 SoC, which between them contain sixteen C66x DSP cores and four ARM® Cortex®-A15 cores, as well as baseband and networking accelerators. The two SoCs are closely coupled with TI’s HyperLink bus as well as Gigabit Ethernet. Each device has its own large 2Gbytes DDR3 memory bank and a 20Gbaud SRIO link to the VPX backplane.

Edward Young, managing director at CommAgility, said, “Alongside our strong AMC and MicroTCA product portfolio, this move into VPX will help to drive further growth and expand our overall market by taking the same wireless processing technologies into a new rugged form factor.”

For additional I/O or co-processing, the main DSP is connected via PCI Express and the AIF2 CPRI interface to a Xilinx Kintex-7 K325T FPGA, which also has Gigabit Ethernet and its own backplane MGT connections. The FPGA has multiple LVDS, GPIO and serial connections to the P2 connector to enable interfacing to an RTM with specialised I/O such as multi-channel RF or high speed ADC/DAC interfaces. It also has a PLL for flexible generation of RF clocks from a standard reference clock input.

The main DSP and FPGA both have a large bank of flash memory for application and data storage, with FLASH upgrades and boot selection managed in conjunction with the Board Management Controller for maximum security.

A full Linux BSP and example software support is provided to accelerate customer development, based on TI’s Multicore Software Development Kit (MCSDK) for Linux and the Xilinx Vivado FPGA development suite. MIMOon’s mi!SmallCellPHY™-TI is available fully integrated and tested, providing a complete LTE physical layer.

The VPX-D16A4 will be available in Q3 2014. For pricing, please contact CommAgility.

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