Accredited as an American National Standards Institute (ANSI) developer and a submitter of Industry Trade Agreements to the IEC, the VSO provides its members with the ability to develop and promote open technology standards. The VSO meets every two months to address embedded bus and board industry standards issues.
VSO study and working group activities
Standards within the VSO may be initiated through the formation of a study group and developed by a working group. A study group requires the sponsorship of one VITA member, and a working group requires sponsorship of at least three VITA members.
Work in progress
Several working groups have current project work underway; the following roundup summarizes those projects.
VITA 17.1: Front Panel Data Port (FPDP)
Objective: This standard defines a multi-drop synchronous parallel non-addressable bus connection between multiple boards in a single chassis. Extension specifications define protocols for specific use cases.
Status: ANSI/VITA 17.1 has been submitted to ANSI for re-accreditation. A VITA 17.3 working group was formed recently to incorporate the Interlaken protocol for packet transfers scaling from 10 Gbps to 100 Gbps. The current plan of record is for VITA 17.3 to be based on 64B/67B encoding and support channel bonding.
ANSI/VITA 42.0: XMC Switched Mezzanine Card Base Specification
Objective: This standard defines a PMC form factor with open standard switch fabric interconnects.
Status: The draft specification has been approved to move to the ANSI balloting phase.
ANSI/VITA 46.11: System Management on VPX
Objective: This standard defines a system management architecture for VPX systems.
Status: ANSI/VITA 46.11-2015 has been accredited by ANSI. Specifications are available for download by VITA members and are posted at the VITA Store for purchase by the general public.
VITA 48.4: VPX REDI: Mechanical Specification Using Liquid Flow Through (LFT) Applied to VPX
Objective: This standard will establish the mechanical design requirements for an LFT cooled electronic VPX module.
Status: The working group is developing a vibration test plan, as well as designing a simplified prototype vibration test module and backplane fixture to further validate the concept of removing the two outer guide pins. A first draft version of the standard is out for review to establish the content structure with details filling in as the design solidifies. The goal is to have testing complete and a draft standard ready for review by the end of the year.
ANSI/VITA 49.x: VITA Radio Transport (VRT)
Objective: The VITA Radio Transport (VRT) standard defines a transport-layer protocol designed to promote interoperability between radio frequency receivers and signal processing equipment in a wide range of applications. The VRT protocol provides a variety of formatting options allowing the transport layer to be optimized for each application. The ANSI/VITA 49.1 VITA Radio Link Layer (VRL) standard specifies an optional encapsulation protocol for VITA 49.0 (VRT) packets.
Status: The working group has completed revisions to VITA 49.0 and VITA 49.1; both were approved to be submitted for ANSI accreditation. The VITA 49a working group has completed a document for control packet and spectrum analyzer packet specifications and has voted to submit for ANSI accreditation.
VITA 57.4: FMC
Objective: This project aims to develop a next-generation specification calling for a new set of connectors to support higher-speed serial interfaces.
Status: The working group is reviewing pinout proposals and plans to finalize a specification for working group ballot by the end of this year.
ANSI/VITA 65: OpenVPX Architectural Framework for VPX
Objective: The OpenVPX architectural framework specification is a living document that is continuously being updated with new profile information and corrections.
Status: The working group is reviewing clocking, keying, and nomenclature proposals for the next release.
VITA 66: Optical Interconnect on VPX – Half Width MT
Objective: The VITA 66 base standard defines physical features of a stand-alone compliant blind mate Optical Interconnect for use in VPX systems. This standard defines a Half Width MT style contact variant.
Status: VITA 66.4 has completed the ANSI public review ballot. The working group is reviewing comments.
VITA 67.3: VPX: Coaxial Interconnect, 6U, Four Position SMPM Configuration
Objective: This specification details the configuration and interconnect within the structure of VITA 67.0, enabling a 6U VPX interface containing multi-position blind mate analog connectors with up to four SMPM contacts.
Status: The working group has begun work on the draft specification.
VITA 68: VPX: Compliance Channel
Objective: This standard defines a VPX compliance channel including common backplane performance criteria required to support multiple fabric types across a range of defined baud rates. This allows backplane developers to design a backplane that supports required Bit Error Rates (BER) for multiple fabric types. This also allows module developers to design plug-in modules that are interoperable with other modules when used with a compliant backplane.
Status: The working group has developed a simulated model and is now collecting actual performance data to help refine the models when the specification goes to “Trial Use” status.
VITA 75: VNX
Objective: VNX describes a rugged small form factor subsystem intended to be rugged for deployed environments.
Status: The working group is reconvening to complete the work necessary to take this specification to ANSI accredited status. Interested parties are invited to join the working group.
VITA 78.1: SpaceVPX Lite Systems
Objective: This document leverages the work done on ANSI/VITA 78 to create a specification with an emphasis on 3U module implementations. The most significant change from SpaceVPX is to shift the distribution of utility signals from the SpaceUM to the System Controller to allow a radial distribution of supply power to up to eight payload modules.
Status: The working group is developing a draft document of the specification.
VITA 79: Embedded Photonics
Objective: This working group is chartered with developing a standard based on work done by the JEDEC 13.6 subcommittee for photonics. This is the first step in preparing a series of projects to address using optical backplane technology in the future.
Status: The working group is currently working on developing an environmental qualification document that encompasses complimentary features from various U.S. and European standards.
Participating in these working groups is a great way to influence the direction of the next generations of technology important to the critical embedded computing industry. Contact VITA if you are interested in participating in any of these working groups and for details on upcoming VSO meetings.
Copies of all specifications reaching ANSI recognition are available from the VITA website. For a more complete list of VITA specs and their status, go to www.vita.com/Specifications.