The concept of hardware programmability, fundamental to the realization of Software-Defined Radio (SDR) systems, has over recent years stimulated the development of a variety of COTS-based hardware products that receive, process, and transmit radio signals. The design of present-generation data acquisition subsystems involves choosing hardware architectures and components that are crucial to their success. Trade-offs are inevitably made, and integrators must be aware of the effects those trade-offs have at the system level when they choose the individual building blocks. To reach the highest levels of functionality, paramount considerations include form factor, converter components, and onboard processing power – FPGA versus ASIC.
