The VITA 65 (OpenVPX) effort was begun a year ago in the OpenVPX Industry Working Group to provide a system-level framework for VPX interoperability. The VPX family of standards is very flexible; this provides very high performance, but can make it more difficult to integrate a system with interoperable modules. The answer to this interoperability dilemma was the creation of OpenVPX. However, since OpenVPX is so new, an understanding of how to match up compatible OpenVPX backplanes and modules is needed first.
VITA 65 OpenVPX approach
VITA 65 provides a framework for system- level interoperability using several different profiles. The profiles are different because not all applications are the same. Different types of applications tend to utilize different system architectures, requiring different backplane connectivity for these different system architectures.
Matching module/backplane profiles
To aid in navigating the document, the OpenVPX standard PDF document1 includes hyperlinks that navigate from backplane profiles to slot profiles, and from slot profiles to module profiles. The VITA 65 working group has added some handy tables that provide a cross-reference between backplane profiles to the module profiles that are compatible with the specified slot profiles on each backplane.
It is important to note that there may be more than one module profile that is compatible with a particular slot on a particular backplane. Compatibility is based on which signals on which connector pins are actually connected in the backplane. Another compatible module profile may have additional defined signals that are not connected on the backplane, but as long as all of the signals that are connected on the backplane match up with defined signals of the same type on the module, it is compatible.
Matching backplane/module aspects
Since the Serial RapidIO, PCI Express (PCIe), and Ethernet fabrics all have several different possible data rates, the backplane profiles have “–dash numbers” for different combinations of speed grades for the data, control, and expansion fabric planes.
This concept also extends to the module profiles, which have “–dash numbers” for different combinations of speed grades and fabric types for the data, control, and expansion fabric planes as well.
Of course, the modules communicating over the backplane must be compatible, using the same fabric protocols and speeds and having gbaud rates compatible with the backplane. For example, a module with PCIe fabric on the data plane would not be compatible with a module with Serial RapidIO fabric on the data plane. Table 1 shows an example of compatible module profile combinations along with backplane profiles. It also shows an example of “–dash numbers” of a particular payload module profile (MOD6-PAY-4F1Q2U2T-12.2.1-x), paired with a particular switch module pro- file (MOD6-SWH-20U19F-12.4.1-x). For each module profile “–dash number,” the table shows the protocols for the data plane, expansion plane, and control plane. It also shows the compatible backplane profiles (BKP6-CEN16-11.2.2-x, BKP6-CEN20-11.2.3-x, BKP6-CEN10-11.2.4-x), as well as backplane gbaud rates for each of the module profile “–dash numbers.”
OpenVPX wrap-up
The VITA 65 (OpenVPX) standard provides a framework for interoperability. There is a great deal of information to navigate, but it is well structured, and the PDF document contains hyperlinks to allow a new reader to effectively use the document. The leading VPX suppliers have all been actively involved in the VITA 65 working group process, and we stand ready to help customers with questions on compatibility.
1 The VITA 65 OpenVPX PDF document is currently on the VITA website, accessible to VITA members
