Are the engineers at Altera perfectionists? We don’t know, but considering their latest attempt to improve upon a good thing, perfectionism could be a distinct possibility. And their most recent FPGA incarnation (or perhaps iteration) proves this point: the newest member of the 40 nm Stratix IV E family, the EP4SE820. Providing a density increase of 53 percent over Altera’s EP4SE530 FPGA, Altera says the device’s 820 K logic elements set an “industry leading” benchmark. Military, wireless, wireline, and storage apps, in addition to ASIC emulation and prototyping, are the beneficiaries.
And though the logic elements are impressive, the story doesn’t stop there. High-end digital apps are also benefitted by the EP4SE820’s 650 K registers and 600 MHz embedded memory (23.1 Mb). As if that weren’t enough, speeding through the EP4SE820 at 550 MHz are 18 x 18 multipliers (960 of them). The device also boasts 1.25 Bbps LVDS and 1,120 I/0s to ease use. However, some might still wonder about FPGAs’ infamous long development timeframes. In the case of the EP4SE820C, compatibility with Altera’s Quartus II design software including “advanced place-and-route algorithms,” among other features, makes shorter FPGA development times a reality.