To the uninitiated, it can seem as if SBCs have become something of a commodity – and to some extent, this is true. More decisions are premade for the SBC designer now than in the past: Freescale, for example, has thoughtfully integrated processor, memory control, and I/O control into a single piece of silicon in the 8640 and 8640D, taking away the opportunity for the board designer to demonstrate his or her skill in providing an optimum pathway between the three.

In a similar vein, Intel has long been offering “cookbook” designs providing the prescribed “recipe” – which not only specifies the devices to use and in which combination, but also details of how to route sensitive high-speed tracking such as the bus between memory and the memory controller. This “cookbook” is followed to the letter, and the design is more or less guaranteed to work. Thus, it might seem as though what was once a challenging design task is now more a case of “joining the dots.” Silicon integration improves performance and lowers cost, but it can also appear to reduce the opportunity for board designers to differentiate their boards from the competition because all are using the same core chipsets.

So where does the differentiation come from? The fact is that even highly integrated silicon or “cookbook” approaches don’t offer actual performance and functionality, but the potential of performance and functionality. Differentiation comes not from making the board work, but from making the most of the available features, extracting all the performance on offer, and making all this available to the end user in an easily accessible way – from both a hardware and software perspective. And a career path still exists for talented design engineers because there are still many ways of differentiating SBCs in terms of serial switched fabrics, form factors and architectures, I/O, and operating systems.

The switched serial fabric revolution

What has perhaps transformed the SBC market more than any other single factor is the advent of serial switched fabrics. These are now well established in terms of awareness, but the fact is that only a very small minority of military applications is using them. It’s hard to overstate their significance: They, possibly more than any other design parameter, have become the starting point, the driving force behind the development and differentiation of new single board computers.

Perhaps less well understood, however, is how each of the major switched fabrics might best be applied in different system scenarios. GbE, for example, has the advantage that it is ubiquitous. It can readily connect to any number of end devices – its theoretical limit is more than 4 billion under IPv4 – and uses simple, affordable Cat-5e cabling. On the other hand, it can consume CPU cycles (as much as 80 percent on a 1 GHz Freescale 8641 processor), and there are many applications that require low latency that Ethernet cannot guarantee. (The latency of Ethernet is variable, but it is generally on the order of hundreds of milliseconds.)

PCI Express excels at the interconnection of many high-bandwidth peripherals, for which there is now a wide choice of silicon. For peer-to-peer communications, however, significant software configuration is required, providing an opportunity for vendor differentiation. Meanwhile, peer numbers are best kept modest for efficient operation: A practical number is between four and eight.

In contrast, Serial RapidIO scales up much better for peer-to-peer communications, with advantageous characteristics such as short packet sizes (up to 256 bytes) to reduce latency – typically by a factor of four compared with Ethernet – for memory access, doorbells, mailboxes, and so on. Software configuration is also more straightforward, yet the choice of silicon is unlikely to ever match that arising from the mass-market acceptance of PCI Express.

Ethernet, PCI Express, and Serial RapidIO are far from mutually exclusive. It’s possible, for instance, to envisage a high-performance system in which high-speed ADCs are connected via PCI Express with Serial RapidIO for node-to-node transfers within a back-end multiprocessing system. The results could then be relayed via Ethernet to a host computer for visualization (Figure 1). That kind of highly typical application architecture is probably what Freescale had in mind when integrating all three fabrics into the 8640 and 8640D processors.

Critical form factors, architectures

To make the best use of available fabrics, form factor selection is critical – and a strong differentiating factor among SBCs. Many mil/aero system designers are now choosing the VPX system architecture – because of its inherent fabric-centricity and the 6.25 Gbps bandwidth of its connectors – or even VXS, where a straightforward bridge to legacy applications is required. This transition from bused architectures to point-to-point architectures is set to unleash the performance benefits of modern processors. But the choice of processor architecture often depends on what has gone before. PowerPC is often chosen because of the sheer volume of existing systems based on PowerPC, to which a major conversion effort is unthinkable.

Intel has, though, unquestionably gained high visibility in recent months with its 45 nm Penryn-based Core 2 Duo and quad-core Xeon processors at 2+ GHz already shipping. However, the lack of native support for Serial RapidIO in the Intel world has, thus far, meant that the PowerPC remains the processor of choice in multiprocessing applications where high-speed, node-to-node communication is required – even in nonlegacy environments.

Meanwhile, Freescale has ambitious plans for the PowerPC architecture in the shape of the QorIQ family of processors. Based around the Power Architecture e500mc core and retaining software compatibility with the PowerPC platform, QorIQ also uses a 45 nm process (with a roadmap to 32 nm) and is planned to support up to eight cores. Freescale’s goal, reportedly, is to bring in these high-performance processors within a power envelope of 30 W – music to the ears of many military embedded computing developers.

Game-changing I/O possibilities

Beyond the aforementioned factors, hardware differentiation is increasingly focusing on I/O – a key “care about” for many customers, given that levels of compute performance are, in the large majority of cases, more than adequate. Designers are using combinations of front and rear connectors in innovative ways to maximize user options.

Various I/O differentiating approaches exist. One is to use miniature multipin front I/O connectors that use little front-panel space and can offer access to multiple functions via a simple adapter cable. Additionally, multiplexed functions to the rear I/O pins can be hardware- or software-selectable to customize a board’s I/O to the user’s required profile.

Beyond this, some vendors are now offering modules that either modify or add features to existing boards. It is possible, for example, to create a module that can be plugged into a range of SBCs to add features such as MIL-STD-1553, SCSI, graphics, and additional flash memory – or, in fact, virtually any functionality desired by the customer. This I/O flexibility allows a customized product to be easily created from a COTS product – but the custom product remains, for all intents and purposes, a COTS product. An example is the GE Fanuc AFIX (Additional Flexible Interface Extension) module (Figure 2).

Operating systems: Making a difference

And SBC differentiation is not just about the hardware. Elevated hardware functionality and configurability provide a rich base for software value-add, some of which may be linked to supporting third-party COTS offerings such as operating systems or layered services. Also, some software is tightly coupled to hardware and so ideally defined by the SBC vendor for the most efficient solution.

Increased competition among the real-time operating system vendors, more use of Linux for deployed mil/aero systems, and a noticeable shift toward Intel architectures have all led to a situation where a broad range of supported software environments is now no less mandatory than support for a broad range of hardware. Hardware vendors can differentiate themselves in their ability to map optimum hardware configurations and operation onto the specific internal mechanisms of any operating system. Likewise, maximizing hardware utility via additional APIs is key, as operating systems formally define only a subset of the hardware interfaces typically required by mil/aero integrators.

Further differentiation comes from the ability to provide enhanced operation of layered packages such as OpenGL, higher-level visualization suites, communication middlewares, fabric configurability, and so on. Boot firmwares can be augmented by flash manipulation services, quick startup options or security features, or maintenance modes.

Is there only one choice?

Differentiation among SBCs might seem scarce these days in light of silicon integration and “cookbook” design procedures, but myriad choices in switched serial fabrics, form factors and architectures, I/O, and operating systems make SBC differentiation a reality, nevertheless. An example of a COTS board offering market differentiation is GE Fanuc’s VXS DSP220 multiprocessor board, which is a simple respin of the VPX-based DSP230 except for its edge connectors. Continued development of standards-based SBC product ranges across the board is bringing about differentiation in increasingly imaginative and appropriate ways. As a result, the stage is set for customers to benefit by being able to source exactly the single board computer they require.

Richard Kirk is Global Product Manager, Military and Aerospace SBCs, at GE Fanuc Intelligent Platforms. He earned a Bachelor of Science degree from Manchester University in the UK and an MBA from the Open Business School in 1997. He joined Plessey Optoelectronics as an engineer in 1986, later being recruited by Radstone – now part of GE Fanuc Intelligent Platforms – where he fulfils product management responsibilities for the company’s family of single board computers for military and aerospace applications. 

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