With PCI Express now the de facto on- and between-board “bus,” it’s more important than ever to debug signals and protocols. And with now-available high I/O VPX boards, there will be more PCIe lanes than ever traveling around a VME chassis; that’s why it’s critical to make sure those PCIe lanes are working correctly. Mentor Graphics’ PCI Express verification combo consists of the Veloce family of ICE accelerator devices plus the iSolve PCI Express adapter platform. Together, they can verify PCI Express operation, signaling, and I/O connectivity, and even provide real-world PCIe stimulus to in-design VME systems. The typical solution consists of a PCIe-equipped PC, the iSolve adapter, and a Veloce hardware accelerated PCIe ICE.
Together, the platform delivers a 1,000 to 10,000x speed improvement over software-only simulation, which “saves weeks or months of regression time.” The solution can identify and fix corner-case bugs in hardware (processor interfaces, bridges, I/O devices, and board traces), and is compliant to both PCIe 1.1 and 2.0. The platform supports all architectures – endpoint, root complex, switch, and bridge – as well as x1, x2, x4, and x8 lanes. Protocols for memory, I/O, configuration, and message transactions are tested or emulated, and interleaved packets across all lanes can be configured. iSolve is flexible, in that it can be configured either for upstream traffic (toward the root complex) or downstream to the endpoint (with emulation in the opposite direction).
