|
|
| 4-dimension hypercube, image courtesy of Wikipedia |
|
|
| 6-dimension hypercube, inner point (yellow) represents four nodes, third ring (orange) represent two nodes each, image courtesy of Wikipedia. |
Scottsdale, AZ, April 17, 2012 — VITA, the trade association for standard computing architectures serving critical embedded systems industries today announced the formation of a working group that will develop the pin-outs and the connection diagrams for building 4- and 6-dimensional hypercubes. These hypercubes enable using the VPX architecture as a standard supercomputing platform for embedded applications running complex algorithms for radar, sonar, SIGINT, and other data-intensive applications.
“At the March VSO (VITA Standards Organization) meeting in Orlando, a new standards effort, VPX-SC was proposed,” stated Ray Alderman, executive director of VITA. “It may be an addition to the present OpenVPX document as new profiles, or it may be a new specification, if the working group agrees.” A 4-dimensional hypercube can be designed with as few as four VPX modules, with four nodes on a module. A 64-node, 6-dimensional hypercube could be built with 16 VPX modules, with four nodes on a module.
A hypercube architecture offers the advantage that each node (vertice) has n number of connections with 2 to the n power nodes total. This architecture is very deterministic because the number of links to any node never exceeds n-1. Hypercubes larger than 6-dimensions tend to have too much latency and become too unwieldy for many applications. Hypercubes are more manageable than a full mesh design that routes each node to every node. With more than 5 or 6 nodes, the number of links becomes too complex to cost effectively support in a full mesh architecture.
The need for massively parallel computers for complex algorithms continues to grow. With some guidance, the VPX architecture could meet the requirements of many applications, especially those in data-intensive critical embedded systems. New algorithms continue to emerge that will require tremendous amounts of computing power and interconnect bandwidth. With the advancements in computing power offered by GPGPUs (General Purpose computation on Graphics Processing Units) and chips like the Knight’s Corner chip, along with the low latency and performance of InfiniBand interfaces, the technology now exists to take VPX into supercomputing applications that require these performance levels.
The working group will be developing implementations using existing copper wire based interconnects and mapping out solutions for optical interconnects using the ANSI/VITA 66 Optical Interconnect on VPX specification.
Companies interested in participating in the working group should contact VITA.
Links to News on Algorithms
Larry Hardesty, “The faster-than-fast Fourier transform”, MIT News, January 18, 2012,
URL: web.mit.edu/newsoffice/2012/faster-fourier-tran[…]
David L. Chandler, “Sometimes the quickest path is not a straight line”, MIT News, March 8, 2012,
URL: web.mit.edu/newsoffice/2012/underwater-swarms-r[…]
About VITA
Founded in 1984, VITA is an incorporated, non-profit organization of suppliers and users who share a common market interest in critical embedded systems. VITA champions open system architectures. Its activities are international in scope, technical, promotional, and user-centric. VITA aims to increase total market size for its members, expand market exposure for suppliers, and deliver timely technical information. VITA has ANSI and IEC accreditation to develop standards (VME, VXS, VPX, OpenVPX, VPX REDI, XMC, FMC, etc.) for embedded systems used in a myriad of critical applications and harsh environments. For more information, visit www.vita.com.