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  Industry News  New 6U FPGA-based VMEbus SBC from MEN Micro Boasts Triple Redundancy Ideal for Safety-Critical Applications in Avionics and Railway Markets
Industry News

New 6U FPGA-based VMEbus SBC from MEN Micro Boasts Triple Redundancy Ideal for Safety-Critical Applications in Avionics and Railway Markets

MEN Micro, Inc.MEN Micro, Inc.—September 3, 20100
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AMBLER, Pa. September 2010 – MEN Micro Inc., a world-renowned provider of embedded computing and I/O solutions for mission-critical industrial, mobile and harsh environment applications, now offers the 6U FPGA-based, triple-redundant A602 64-bit VMEbus single board computer (SBC) that employs a lock-step architecture keeping software development at a minimum.

With this redundant lock-step system that increases system reliability, the SEU-resistant A602 runs the same set of operations in parallel to ensure that the programming only views the hardware components once, making the new board ideal for mission-critical applications including those in the avionics and railway markets.

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The single-slot, COTS-based A602 developed according to DO-254 offers incomparable reliability and economical implementation with high reliability up to Design Assurance Level (DAL) A (catastrophic) in avionics and up to Safety Integrity Level (SIL) 4 in trains, the most stringent level in each class.

To ensure the highest safety standards, the 900 MHz PowerPC 750, the 512 MB main memory and the internal structure of the FPGA are triple-redundant. Critical functions, like voters implemented as IP cores in the FPGA, monitor at least two of the three redundant components to provide the same result to guarantee system reliability. In the event one of the three redundant components fails, the system remains completely operational providing the required availability for highly critical systems.

Other redundant components in the SBC include local PSUs, Flash memory and clock oscillators. In an effort to increase safety and availability, additional diagnosis mechanisms (BITE, e.g. extensive self tests) help detect latent errors before they lead to a system error. The design is oriented towards strictly deterministic operation for the same purpose – to avoid interrupts and DMA.

Standard I/O contained in the FPGA is accessible via the rear. This includes a sextuple UART, an I²C bus and an RS232 interface that can also be led to the front. The A602 also provides two PMC slots, one accessed via the front or rear I/O that can be used with all standard PMC modules and the other for an AFDX PMC connection via rear I/O.

Operating temperature is -40°C to +50°C with qualified components.

Pricing for the A602 is $12,994. Delivery is six to eight weeks ARO.

For additional information, visit www.menmicro.com/products/01A602-.html or contact Stephen Cunha, MEN Micro Inc., 24 N. Main Street, Ambler, Pa. 19002; Phone: 215-542-9575; Fax: 215-542-9577; E-mail: [email protected].

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