• Version 1.1 of the ePAPR specification includes incremental changes; adds new chapter on virtualization, leveraging Power ISA; expected to contribute to lower development costs
• Virtualization chapter defines a standard para-virtualization interface for use by a hypervisor and guest operating systems enabling implementations by different software vendors to seamlessly work together
• Virtualization features include an ABI and APIs for a set of hypervisor services including– a virtual interrupt controller, byte-channels, and inter-partition doorbells
• Representation of CPUs in device trees is extended to better support representation of processors with a large number of CPUs, multi-threaded CPUs, and to define which Power ISA categories a CPU implements; several device tree properties in common use are now formally standardized.
• The document revision history v1.1 identifies the specific changes and additions from v1.0, addressing scalability of embedded systems for multi-core processors and multithreading.
Updated specification can be downloaded at https://www.power.org/resources/downloads/
• The ePAPR specification defines standards for Power Architecture® system around how a boot program starts a client program (e.g. an operating system) including device trees and how multiple CPUs are initialized and started on a multi-core processor.
About Power.org
Celebrating 20 years of leadership, Power Architecture technology is behind millions of innovative products, including the world’s fastest supercomputers, leading video game consoles, and electronic systems in most of today’s car models. The open Power.org community, formed in 2005, is the organization driving collaborative innovation around Power Architecture technology. Power.org’s mission is to optimize interoperability, accelerate innovation and drive increased adoption of this leading processor architecture. For more details, visit www.power.org.
